Recent advances in quantum hardware have enabled the development of larger, more capable systems, marking an exciting time for the industry. However, quantum computers are still at a relatively early stage of development, and reaching broad quantum advantage will require getting the best possible performance out of these devices.
To extract the maximum performance from hardware, physicists first need to understand how that hardware behaves. To do so, they run characterization experiments.
What are characterization experiments?
Quantum processor characterization is a key step in preparing quantum hardware for practical use. By measuring the physical properties of quantum processing units (QPUs), characterization helps build an understanding of processor behavior and informs the calibration of quantum gates, helping to identify potential sources of errors and ultimately improve computational fidelity.
When examining hardware behavior, physicists can run many different types of characterization experiments. Common examples include T1 and T2 characterization, which measure energy relaxation time and phase coherence time, respectively, as well as experiments that determine the frequency of individual qubits, an essential parameter for accurately controlling their quantum states.
However, other effects can occur within a processor, causing unintended changes in qubit frequencies or changes to qubit states during computation, both of which can affect hardware performance and the fidelity of the computation. Characterizing these effects is essential to ensuring accurate gate operations and developing control strategies that minimize unwanted interactions as a processor scales.
On superconducting QPUs, two such effects are ZZ crosstalk and control crosstalk.
Characterizing ZZ and control crosstalk
In superconducting processors, ZZ crosstalk is one of the most significant sources of systematic errors. It can cause unwanted shifts in the relative phases of quantum states, leading to errors that accumulate during computation. These unwanted interactions can occur even when a processor should be doing nothing, with small interactions persisting between certain qubits.
Control crosstalk occurs when the control signals used to drive a rotation on a target qubit unintentionally rotates or shifts the phase of other qubits in the system, introducing small errors over time, resulting in long-term disruptions to a computation or a qubit’s stored information. Both ZZ and control crosstalk can occur between neighboring qubits as well as between more distant qubits across the processor.
By gaining a better understanding of where these interactions are occurring, physicists can use decoupling techniques to mitigate the effects of crosstalk and reduce errors.
By gaining a better understanding of where these interactions are occurring, physicists can use decoupling techniques to mitigate the effects of crosstalk and reduce errors.
For example, ZZ crosstalk across the processor can be significantly reduced by dividing the processor into groups of qubits where the coupling between them is maximal and then applying an echoing sequence of pulses to suppress it.
Why crosstalk characterization is challenging at scale
Conventional characterization methods are pairwise in nature, meaning they typically focus on interactions between pairs of qubits. On smaller processors, performing characterization experiments with these methods is relatively straightforward because it requires little overhead to check every pair of qubits.
One commonly used technique for measuring ZZ crosstalk between two qubits is the joint-Ramsey experiment, often considered a gold standard for this type of characterization. It involves preparing one qubit in a superposition of states, first in an experiment with a second qubit in the 0 state and then in another experiment with it in the 1 state, and taking multiple measurements after progressively longer periods in each experiment. By comparing the rate of the first qubit's phase change in these two experiments, physicists can determine the strength of the unwanted coupling between them.
The pairwise method for characterizing control crosstalk is to apply a drive pulse to one qubit while monitoring the responses of a second qubit located elsewhere on the processor to identify unintended effects of the control signal. Crosstalk between multiple pairs can be characterized in a single experiment if they share the same driven qubit.
These conventional approaches provide precise measurements of individual interactions, but their pairwise nature makes comprehensive processor characterization increasingly time-consuming and resource-intensive as the number of qubits grows.
These conventional approaches provide precise measurements of individual interactions, but their pairwise nature makes comprehensive processor characterization increasingly time-consuming and resource-intensive as the number of qubits grows.
For a processor with N qubits, the number of possible qubit pairs grows quadratically, meaning that doubling the number of qubits results in approximately four times as many pairs. As a result, exhaustive characterization with conventional methods eventually becomes impractical—and impossible—as processors scale.
With our multiplexed protocols, the number of characterization experiments required scales logarithmically with the number of qubits, which we believe makes accurate and efficient characterization of high-qubit-count systems possible.
With our multiplexed protocols, the number of characterization experiments required scales logarithmically with the number of qubits, which we believe makes accurate and efficient characterization of high-qubit-count systems possible.
As a result, characterizing control and ZZ crosstalk in a processor with one million qubits can require less than three times as many measurements as a QPU of only one hundred qubits.
Scaling crosstalk characterization with multiplexing
Having previously developed multiplexing techniques for ZZ crosstalk, our team has now extended these techniques to other characterization experiments, including control crosstalk, and they recently used these techniques to characterize large processors, with accuracy validated against pairwise measurements.
Our multiplexed protocol addresses the issue of scalability by combining many of these characterization experiments into a small number of runs where the number of measurement settings required scales logarithmically with the number of qubits, rather than scaling with the number of qubit pairs. Because it requires few measurements, this approach can significantly reduce the time and resources required to characterize crosstalk across the entire system.
For example, on a 100-qubit processor, when compared with conventional pairwise measurements, our multiplexing approach reduced the number of measurement settings per experiment from approximately 5,000 to just 7, representing a more than 700-fold reduction.
On a 100-qubit processor, when compared with conventional pairwise measurements, our multiplexing approach reduced the number of measurement settings per experiment from approximately 5,000 to just 7, representing a more than 700-fold reduction.
With logarithmic scaling, a million-qubit processor would require just 20 measurement settings, while a billion-qubit processor would require only 30.
When working with quantum hardware, time is also a valuable resource. While characterization experiments are underway, the processor is unavailable for other computations. Our multiplexed protocol can significantly reduce the time required for characterization. For example, on a 1,000-qubit chip with coherence times of 100 microseconds, characterizing ZZ crosstalk using 10,000 shots per joint-Ramsey experiment would take around 694 hours, or approximately 29 days, with conventional pairwise methods assuming a time per shot of five times the coherence time. Using our multiplexed approach, the same characterization could be completed in just 50 seconds, with similar precision.
Our team recently implemented our multiplexed processor characterization on the Rigetti Cepheus-1-108Q processor. To verify the accuracy of the results, they randomly selected sets of qubit pairs from the multiplexed processor characterization and performed conventional pairwise measurements on each of those pairs.

Figure 1. Two-dimensional map of ZZ crosstalk between qubit pairs, extracted using the multiplexing protocol for Rigetti Cepheus-1-108Q. For qubits with anomalously low coherence time or high readout error, there is significant uncertainty in the computed coupling from both direct or multiplexed experiments, leading to some qubits appearing to have many strong long-range interactions

Figure 2. Validation on three example qubit pairs (Q0-Q1, Q79-Q88, and Q92-Q93), showing very good agreement between individual pairwise measurements and the multiplexed protocol on the Cepheus-1-108Q QPU

Figure 3. Distribution of average ZZ couplings with (green) and without (blue) suppression techniques
The team also extended this multiplexed characterization approach to characterize control crosstalk, implementing the protocol on our in-house quantum computer Ember-1.

Figure 4. Control crosstalk on a specific qubit obtained using multiplexed (top) and individual pairwise (bottom) measurements on our Ember-1 testbed system. The left panel corresponds to the timeseries data and the right to the frequency domain obtained by taking the discrete Fourier transform on the timeseries data. Strong agreement can be seen between the multiplexed and individual measurements. Strong crosstalk between qubits 4 and 7 can be seen, meaning that driving qubit 7 will also drive qubit 4 with a coupling strength of about 250kHz
Advancing quantum hardware performance through software-driven characterization
Our multiplexed protocol demonstrates how software-driven multiplexing can make quantum processor characterization more efficient and scalable. We believe this technique can be readily extended to other interactions, including readout-induced effects and two-qubit gate calibration.
By developing software tools that enable more accurate, efficient, and scalable hardware characterization and calibration, we aim to maximize the performance of quantum hardware and accelerate the path to broad quantum advantage.
Forward looking statements
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